Cradlepoint USB-Host to Ethernet Adapter PS6U1UHE Uživatelský manuál stáhnout pdf (Strana 9)

US

7,984,226

B2

INl

1N2

COM

to

NO

and

NO

to

COM

COM

isolated

from

N00, N01,

and

N02

COM

=

NOl

COM

=

NOO

COM

=

NO2

Thus,

the

COM

terminal

and

the

signal

VBUSOUT

is

isolated

or

grounded

When

1N1

is

loW

(loW

voltage),

and

connected

to

VBUSDON

or

VBUSEXT

When

1N1

is

high

(high

voltage).

When

1N1

is

high,

VBUSOUT

is

connected

to

VBUSDON

When

1N2

is

loW,

and

to

VBUSEXT

When

1N2

is

high.

The

USB

data

lines

at

the

MDT

connector

28

are

selected

from

either

the

USB

data

lines

from

the

USB

jack

24

or

the

dongle

50

solely

by

the

state

of

node

114

Which

is

connected

to

1N2.

That

is,

When

node

114

is

loW

(1N2

is

loW)

USB

data

from

the

dongle

50

is

coupled

to

the

MDT

connector

28,

and

When

node

114

is

high (1N2

is

high)

USB

data

from

the

USBjack

24

is

coupled

to

the

MDT

connector

28.

If

a

user

has

both

an

Ethernet

connection

to

the

docking

cradle

12

and

a

USB

connection

from

a

USB

host

connected

to

the

USB

jack

24,

and

the

MDT

10

is

connected

to

the

MDT

connector

28

With

the

MDT

10

having

established

a

USB

connection

With

the

dongle

50,

and

the

manual

sWitch

92

is

sWitched

to

the

USB

position

(contact

98

in

FIG.

6)

then

the

MDT

10

does

not

resync

With

a

USB

host

connected

to

the

USB

jack

24

unless

the

USB

supply

voltage

to

the

MDT

connector

28

is

interrupted

long

enough

for

the

MDT

10

to

reset

its

USB

connection.

Without

the

interruption

the

MDT

10

Will

not

be

in

sync

With

the

USB

signal

from

the

USB

jack

24.

The

resynchronization

problem

arises

anytime

the

USB

supply

voltage

to

the

MDT

connector

24

is

sWitched

from

one

of

either

the

USB

supply

voltage

from

the

dongle

50

or the

USB

supply

voltage

from

the

USB

jack

24

to

the

other

of

the

USB

supply

voltage

from

the

dongle

50

or

the

USB

supply

voltage

from

the

USB

jack

24.

FIGS.

7A

and

7B

are

voltage

Waveforms

of

three

nodes

114, 122,

and

129

in

the

circuitry

shoWn

in

FIG.

6

during

a

time

When

the

nodes

are

changing

state.

Node

114,

corre

sponding

to

Waveforms

140

and

146,

node

122

corresponding

to

Waveforms

142

and

148,

and node

129

corresponding

to

Waveforms

144

and

150.

Thus

FIG.

7A

shoWs

the

Waveforms

present

at

nodes

114,

122,

and

129

When

the

voltage

at

node

114

is

changing

from

a

high

voltage

to

a

loW

voltage,

and

FIG.

7B

shoWs

the

Waveforms

present

at

nodes

114, 122,

and

129

When

the

voltage

at

node

114

is

changing

from

a

loW

voltage

to

a

high

voltage.

The

voltages

at

nodes

114 and

122,

corre

sponding

to

Waveforms

140, 142, 146,

and

148,

begin

chang

ing

at

a

time

T0.

At

time

T1

the

voltage

at

node

114

reaches

a

threshold

voltage,

Vth,

and

the

outputY

of

the

exclusive

OR

gate

116

becomes

high,

and

consequently

the

outputY

of

the

open

drain

inverter

123

becomes

loW

Which

causes

the

COM

terminal

of

the

one-of-four

selector

IC

108

to either

become

disconnected

from

the

terminals

N00,

N01,

and

N02,

or

to

be

grounded

depending

on

the

state

of

node

114

at

time

T1.

Thus

the

USB

supply

voltage

is

no

longer

present

at

the

MDT

connector

28,

and

the

MDT

10

Will

detect

the

loss

of

the

USB

supply

voltage

and

reset

its

USB

connection

if

a

USB

supply

voltage

Was

present

at

the

MDT

connector

28

prior

to

time

T1.

At

time

T2

the

outputY

of

the

exclusive

OR

gate

116

becomes

loW,

and

consequently

the

outputY

of

the

open

drain

inverter

123

begins

to

rise

at

a

rate

determined

by

the

resistor

126

and

capacitor

128

until

the

threshold

voltage

at

the

1N1

input

of

the

one-of-four

selector

IC

108

is

reached

at

time

T3

When

the

COM

output

of

the

one-of-four

selector

IC

108

becomes

20

25

30

35

40

45

50

55

60

65

6

connected

to

the

USB

supply

voltage

from

the

dongle

50

or

the

USB

jack

24

depending

on

the

state

of

node

114

at

time

T3.

Thus

the

time

that

the

USB

supply

voltage

is

not

present

at

the

MDT

connector

28

is

at

least

the

delay

152.

For

purposes

of

simplicity

the

threshold

voltages,

Vth,

shoWn

in

FIGS.

7A

and

7B

are

shoWn

as

one

half

of

the

voltage

difference

betWeen

the

high

voltage

state

and

the

loW

voltage

state.

In

one

embodiment

of

the

present

invention,

the

three

resistors

112, 120,

and 126

are

100

K9,

and

the

capaci

tors

124,

121,

and 128

are

1.0

pf.

Another

problem

that

can

arise

is

that

the

manual

sWitch

26

in

FIG.

1

causes

oscillations

on node

102

in

FIG.

6

When

it

is

sWitched

due

to

the

inherent

nature

of

mechanical

sWitches

to

bounce.

These

oscillations,

if

not

?ltered,

could

have

a

detri

mental

effect

on

the

USB

signals

to

the

MDT

10

When

changes

are

made

by

a

user

to

the

manual

sWitch

26.

The

contact

bounce

occurring

in

the

manual

sWitch

26

is

?ltered

from

the

rest

of

the

circuitry

in

FIG.

6

by

a

?rst

delay

stage

of

resistor

112

in

combination

With

capacitor

124.

The

time

constant

of

the

combination

of

the

resistor

112

and

the

capacitor

124

is

long

enough

that

any

bouncing

of

the

con

tacts

ends

before

the

node

114

changes

enough

to

reach

the

threshold

sWitching

voltages

of

the

integrated

circuits

108,

116,

and

118.

Thus

there

is

a

delay

154

from

the

time

node

102

sWitches

from

a

high

state

to

a

loW

state

or a

loW

state

to

a

high

state

and

the

voltage

on

node

114

reaches

the

threshold

voltages

of

the

integrated

circuits

108, 116,

and

118.

While

the

invention

has

been

described

With

reference

to

particular

embodiments,

it

Will

be

understood

by

those

skilled

in

the

art

that

various

changes

may

be

made

and

equivalents

may

be

substituted

for

elements

thereof

Without

departing

from

the

scope

of

the

invention.

In

addition,

many

modi?ca

tions

may

be

made

to

adapt

a

particular

situation

or

material

to

the

teachings

of

the

invention

Without

departing

from

the

scope

of

the

invention.

Therefore,

it

is

intended

that

the

invention

not

be

limited

to

the

particular

embodiments

disclosed

as

the best

mode

con

templated

for

carrying

out

this

invention,

but

that

the

inven

tion

Will

include

all

embodiments

falling

Within

the

scope

and

spirit

of

the

appended

claims.

The

invention

claimed

is:

1.

Routing

circuitry

for

automatically

routing

either

a

?rst

set

of

USB

signals

derived

from

an

Ethernet

local

area net

Work

(LAN)

at

an

Ethernet

connector

or

a

second

set

of

USB

signals

derived

from

a

USB

host

at

a

USB

connector

to

an

output

connector

Which

can

interface

With

a

data

processing

device

comprising:

a)

USB

supply

voltage

selection

circuitry that

passes

a

USB

supply

voltage

from

the

?rst

set

of

USB

signals,

or

the

second

set

of

USB

signals,

or

isolates

the

USB

sup

ply

voltages

from

the

?rst

and

second

set

of

USB

signals

from

the

output

connector

in

response

to

tWo

or

more

?rst

input

signals;

b)

USB

data

selection

circuitry

that

passes

USB

data

sig

nals

from

the

?rst

set

of

USB

signals

or the

second

set

of

USB

signals

to

the

output

connector

in

response

to

one

or

more

second

input

signals;

and

c)

USB

supply

voltage

detection

circuitry

that

detects

if

the

USB

supply

voltage

from

the

second

set

of

USB

signals

is

present,

and

generates

the

tWo

or

more

?rst

input

signals

and

the

one

or

more

second

input

signals

in

response

to

the

detection;

d)

Wherein

the

USB

supply

voltage

detection

circuitry

generates

a

?rst

set

of

?rst

input

signals

Which

isolates

the

USB

supply

voltages

from

the

?rst

and

second

set

of

USB

signals

from

the

output

connector

When

there

is

a

change

in

the

USB

supply

voltage

from

the

second

set

of

1 2 3 4 5 6 7 8 9 10

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