Cradlepoint USB-Host to Ethernet Adapter PS6U1UHE Uživatelský manuál Strana 8
- Strana / 10
- Tabulka s obsahem
- KNIHY
Hodnocené. / 5. Na základě hodnocení zákazníků
US
7,984,226
B2
3
the
docking
cradle
passes
With
any
data
present
at
the
Ether
net
jack
20
to
and
from
the
MDT
10.
The
docking
cradle
12
connects
USB
data
to
and
from
the
USB
jack
24
or
generated
from
the
Ethernet
data
at
the
Ethernet
jack
20
and
a
MDT
jack
28
in
the
docking
cradle
12
and
shown
in
FIG.
5.
Referring
to
FIG.
2,
a
schematic
diagram
of
a
power
supply
section
30
of
a
docking
cradle
for
the
MDT
10
in
accordance
With
at
least
one
embodiment
of
the
present
invention
includes
a
poWer
supply
input
jack
32
connected
to
one
ter
minal
of
tWo
resettable
fuses
34
and
36.
The
second
terminal
of
fuse
34
provides
a
supply
voltage
labeled
VCCOUT
in
FIG.
2,
and
the
second
terminal
of
fuse
36
provides
a
supply
voltage
labeled
DONGLE
PWR
in
FIG.
2
and
is
also
coupled
through
a
diode
38
to
a
poWer
supply
40.
A
USB
supply
voltage
labeled
VBUSEXT
is
coupled
through
another
diode
42
to
the
poWer
supply
40
Which,
in
turn,
provides
a
regulated
output
voltage
VCC.
Thus,
the
output
voltage
VCC
can
be
supplied
from
the
input
jack
32
or
from
the
USB
supply
voltage
VBUSEXT.
Usually
an
external
poWer
supply
is
plugged
into
the
poWer
supply
input
jack
32
to
not
only
poWer
the
circuits
shoWn
in
the
draWings,
but
also
to
recharge
a
battery
in
the
MDT
10.
HoWever,
in
one
embodiment
of
the
present
invention
the
docking
cradle
12
can
pass
signals
to
and
from
the
MDT
10
using
only
the
USB
supply
voltage
VBUSEXT
provided
by
a
USB
host
device
connected
to
the
USB
jack
24.
FIG.
3
is
a
connection
diagram
for
an
Ethernet
to
USB
dongle
50
Which
may
be
used
in
the
docking
cradle.
ShoWn
in
FIG.
3
are
connectors
52, 54,
56, 58,
60, 62,
64,
and
66
Which
connect
to
mating
connectors
on
the
dongle
50
(not
shoWn).
Also
shoWn
in
FIG.
3
is
a
voltage
regulator
68
Which
receives
the
voltage
supply
DONGLE
PWR
shoWn
in
FIG.
2
and
provides
supply
voltage
to
mating
dongle
connectors
60,
62,
and
64.
The
Ethernet
jack
20
is
connected
to
dongle
mating
connector
58.
The
dongle
50
provides
an
Ethernet
terminal
for
the
signals
passing
through
the
Ethernet
jack
20,
including
synchronization
With
the
Ethernet
connection,
and
converting
Ethernet
format
signals
to
and
from
USB
format
signals.
The
dongle
50
also
provides
the
USB
supply
voltage
such
that
the
dongle
50
acts
as
a
USB
host.
The
connectors
54,
56,
and
66
may
provide
signals
indicating
the
status
of
the
dongle
50
such
as
Whether
the
dongle
50
is
in
sync
With
the
external
Ethernet
signal
and
Whether
data
is
passing
through
the
dongle
50.
The
USB
signals
to
and from
the
dongle
50
are
provided
at
dongle
mating
connector
52
Which
are
shoWn
as
USB
supply
voltage
VBUSDON
on
line
72,
and
USB
data
signals
—USBDON
on
line
74
and
+USBDON
on
line
76.
FIG.
4
is
a
connection
diagram
of
the
USB
jack
24
for
receiving
external
USB
signals
from
a
USB
host
such
as
the
personal
computer
16
shoWn
in
FIG.
1.
The
positive
USB
supply
voltage
VBUS
forms
the
supply
voltage
VBUSEXT
on
line
82,
and
the
DM
and
DP
USB
signals
form
the
USB
data
signals
—USBEXT
on
line
84,
and
+USBEXT
on
line
86,
respectively.
The
USB
ground,
GND,
and
the
USB
shields
in
the
USB
jack
24
are
connected
to
ground.
FIG.
5
is
a
schematic
diagram
of
the
MDT
connector
28
Which
mates
With
the
MDT
10
resting
in
the
docking
cradle
12
in
accordance
With
at
least
one
embodiment
of
the
present
invention.
The
MDT
connector
28
receives the
VCCOUT
supply
voltage
shoWn
in
FIG.
2
and
USB
signals
VBUSOUT,
—USBOUT,
and
+USBOUT.
In
addition
serial
bus
signals
88,
if
provided
to
the
docking
cradle
12
by
as
external
device,
are
connected
to
the
MDT
connector
28
for
use
by
the
MDT
10
or
other
data
processing
device
Which
can
communicate
using
the
serial
bus
protocol.
FIG.
6
is
a
circuit
diagram
of
the
sWitching
portion
70 of
the
docking
cradle
Which
passes
the
USB
signals
from
either
the
20
25
30
35
40
45
50
55
60
65
4
Ethernet
dongle
50
or
the
USB
jack
24
to
the
MDT
connector
28,
shoWn
in
FIG.
5,
for
connection
With
data
processing
equipment
such
as
the
MDT
10.
A
manual
sWitch
92,
corre
sponding
to
the
manual
sWitch
26
shoWn
in
FIG.
1,
is
a
triple
pole,
single
throW
sWitch
With
a
?rst
contact
94
connected
to
VCC
Which
corresponds
to
an
Ethernet
only
connection
to
the
MDT
10,
a
second
contact
96
Which
is
not
connected
and
Which
corresponds
to
an
auto
select
position
of
the
sWitch
26,
and
a
third
contact
98
connected
to
ground
Which
corresponds
to
the
USB
only
connection
of
the
USB
jack
24
to
the
MDT
10.
The
armature
contact
100
is
connected
to
a
node
102
Which
is
connected
to
one end
of
a
resistor
104,
the
other
end
of
Which
is
connected
to
the
cathode
of
a
diode
106.
The
anode
of
diode
106
is
connected
to
an
input
labeled
NO2
of
a
one-of-four
selector
IC
108
Which
is
also
connected
to
the
signal
VBUSEXT
from
the
USB
jack
24
shoWn
in
FIG.
4.
Node
102
is
also
coupled
through
a
second
resistor
110
to
ground,
and
through
a
third
resistor
112
to
a
node
114.
Node
114
is
connected
to
a
?rst
input,
labeled
B
in
FIG.
6,
of an
exclusive
OR
gate
116,
to
an
input
IN2
of
the
one-of
four
selector
IC
108,
and
to
inputs
S1
and S2
of
a
one-of-tWo
USB
selector
IC
118.
Node
114
is
also
coupled
through
a
resistor
120
to
the
second
input,
labeledA
in
FIG.
6,
of
the
exclusive
OR
gate
116
Which,
in
turn
is
coupled
to
ground
through
a
capacitor
121.
The
common
connection
of
the
second
input
of
the
exclusive
OR
gate 116,
the
resistor
120,
and
the
capacitor
121
forms
a
node
122.
In
addition,
node
114
is
coupled
to
ground
through
another
capacitor
124.
In
one
embodiment
of
the
present
invention
the
one-of-four
selector
IC
108
is
a
TS5A3359,
and
the
one-of-tWo
USB
selector
IC
118
is
a
FSUSBl
l.
The
output
of
the
exclusive
OR
gate
116,
labeled
Y,
is
connected
to
the
input,
labeled
A,
of
an
open
drain
inverter
123.
The
output
of
the
open
drain
inverter
123,
labeledY,
is
connected
to
an
input
IN1
of
the
one-of-four
selector
IC
108,
and
is
couple
to
VCC
through
a
resistor
126 and
to
ground
through
a
capacitor
128.
The
common
connection
of
the
output
of
the
open
drain
inverter
123,
the
input
IN1
of
the
one-of-four
selector
IC
108,
the
resistor
126,
and
the
capaci
tor
128
forms
a
node
129.
The
one-of-four
selector
IC
108
has
tWo
additional
inputs,
NO0,
connected
through
a
resistor
130
to
VBUSDON
gener
ated
by
the
dongle
50
shoWn
in
FIG.
3,
and
NO1,
connected
through
a
resistor
132
to
ground.
The
output,
labeled
COM,
forms
the
USB
supply
voltage
labeled
VBUSOUT
that
is
connected
to
the
MDT
jack
28
shoWn
in
FIG.
5.
The
one-of-tWo
USB
selector
IC
118
has
a
set
of
USB
data
lines
Which
are
connected
to
one
of
tWo
sets
of
selectable
USB
data
lines
as
determined
by
the
inputs
S1
and
S2.
The
?rst
set
of
selectable
USB
data
lines,
labeled
1D+
and
1D—
in
FIG.
6,
are
connected
to
signals
labeled
+USBDON
and
—USBDON,
respectively,
generated
by
the
dongle
50
shoWn
in
FIG.
3.
The
second
set
of
selectable
USB
data
lines,
labeled
2D+
and
2D-
in
FIG.
6,
are
connected
to
signals
labeled
+USBEXT
and
—USBEXT,
respectively,
Which
are
USB
data
connections
at
the
USB
jack
24
as
shoWn
in
FIG.
4.
The
set
of
data
lines
labeled
D+
and
D—
are
connected
to
USB
data
lines
labeled
+USBOUT
and
—USBOUT,
respectively,
Which
are
connected
to
the
MDT
connector
28.
The
COM
output
of
the
one-of-four
selector
IC
108
is
coupled
to
none
or
one
of
the
three
inputs
NO0, NO1,
and
NO2
according
to
the
folloWing
table
Where
H
indicates
a
high
voltage
(equivalent
to
a
logical
l
voltage)
and
L
indicates
a
loW
voltage
(equivalent
to
a
logical
0
voltage):
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